adjipangestu7

adjipangestu7

@adjipangestu7
1
Followers
1
Following
3
Public Repos
0
Private Repos

Language Breakdown

Lines of code distribution across 3 owned repositories

413K Total LOC
SystemVerilog
284,406 lines
68.9%
N/A
Verilog
70,963 lines
17.2%
N/A
Tcl
30,799 lines
7.5%
N/A
VHDL
17,625 lines
4.3%
N/A
Python
6,929 lines
1.7%
N/A
Other
2,117 lines
0.5%
N/A
I

I-Shaped Developer

I-shaped

Specialist — deep expertise in SystemVerilog

SystemVerilog
Verilog
Tcl
VHDL
Python

Collaboration Network

Global Impact visualization

LIVE
adjipangestu7
0 active collaborators

Repos

3

PRs

0

Growth

+18%

Top Collaborators

No collaborator data yet.

Coding Streak

Contribution activity over the past year

1 day
15
Contributions
13
Commits
0
Pull Requests
Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun
Mo
We
Fr
Based on GitHub activity
Less
More
Following
1 total
Synced via GitHub

Open Source Impact

Contributions to external projects

0 merged PRs

No external contributions found.